ULTRARAM nears pilot production after scalable epitaxy breakthrough

Quinas Technology and IQE plc say ULTRARAM has cleared a major manufacturing hurdle after they developed an industrially scalable epitaxy process, and the partners are now discussing pilot wafers and packaged chips with foundries. Innovate UK funding and recent intellectual property recognition helped move the project from university labs toward commercial evaluation.

Quinas Technology and IQE plc announced that ULTRARAM, an experimental memory designed to combine DRAM speed with NAND-like persistence, has cleared a key manufacturing hurdle and is moving toward pilot production. After a year of collaboration the partners developed an industrially scalable epitaxy process for the compound semiconductor layers ULTRARAM requires. Both companies report active discussions with foundries and other partners about pilot wafers and packaged chips. Innovate UK funding and recent intellectual property recognition were cited as factors that helped shift the project from university research toward commercial memory products.

At the technical level ULTRARAM relies on resonant tunneling within precisely grown layers of gallium antimonide and aluminium antimonide. The new epitaxy process provides atomic-layer control over those compound semiconductor layers, enabling standard photolithography and etching to form memory cells. In laboratory tests the design demonstrated extremely fast switching, very low switching energy, and data retention measured in years rather than hours. The partners describe the epitaxy milestone as the manufacturing enabler that lets engineers move from proof of concept devices to wafers suitable for industry-standard fabrication steps.

The teams say the technology could deliver system-level benefits if the lab characteristics are reproduced at scale, including eliminating DRAM refresh power in servers, reducing boot and resume times for client devices, and enabling always-on features. They also acknowledge realistic hurdles remain: translating a scalable epitaxy method into profitable, high-yield manufacturing will require supply-chain partnerships, careful yield optimization, and system-level integration. The planned pilot run will serve as the demonstration of whether the process and cell characteristics can be sustained across wafers and in packaged chips.

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