Tsmc debuts A13 process technology

Tsmc has introduced its A13 process at its 2026 North America Technology Symposium as a tighter version of A14 aimed at next-generation Artificial Intelligence, high performance computing, and mobile designs. The company positions the node as a more compact and efficient option with backward-compatible design rules for faster migration.

Tsmc has unveiled its A13 process technology at the 2026 North America Technology Symposium, extending its most advanced manufacturing roadmap with a direct shrink of the A14 node announced in 2025. The process is aimed at supporting growing computational demands in next-generation Artificial Intelligence, high performance computing, and mobile applications through more compact and efficient chip designs.

A13 provides 6% area savings from A14. Design rules are fully backward compatible with A14, enabling customers to quickly migrate their designs to Tsmc’s latest nanosheet transistor technology.

The company also says A13 delivers increased power efficiency and performance gains through design-technology co-optimization. The process is scheduled to enter production in 2029, one year after A14.

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