Synopsys, Inc. announced an expanded collaboration with Intel Foundry at the Intel Foundry Direct Connect 2025 event, introducing certified Electronic Design Automation (EDA) and Intellectual Property (IP) offerings for angstrom-scale chip manufacturing. The focus is on delivering AI-driven digital and analog design flows for the Intel 18A process node, as well as production-ready EDA flows for the advanced Intel 18A-P node, which features RibbonFET Gate-all-around transistor architecture and the industry-first commercial foundry implementation of PowerVia backside power delivery.
To accelerate multi-die design innovation, Synopsys and Intel Foundry are also enabling Intel´s new Embedded Multi-die Interconnect Bridge-T (EMIB-T) packaging technology. This is powered by Synopsys 3DIC Compiler, enabling complex three-dimensional integrated circuit designs. The collaboration ensures that Synopsys´ EDA flows, multi-die solutions, and its comprehensive foundation and interface IP portfolio are fully optimized and certified for use on the Intel 18A and 18A-P nodes, equipping chip designers to efficiently create processors for demanding Artificial Intelligence and high-performance computing (HPC) applications.
John Koeter, Senior Vice President of the Synopsys IP Group, highlighted the partnership´s impact in his keynote, noting that the joint technologies empower customers with holistic silicon-to-system solutions tailored to the evolving needs of the semiconductor industry. The companies aim to accelerate high-efficiency, next-generation chip designs, further positioning themselves at the forefront of semiconductor process and design innovation for Artificial Intelligence and HPC systems.
