Fujitsu details Monaka roadmap for Arm servers with built-in Artificial intelligence acceleration

Fujitsu unveiled details of its Arm-based Monaka datacenter processors at Technology Update 2025, with the first 2 nm chips due in 2027 and subsequent designs adding integrated Artificial intelligence acceleration through 2031.

Fujitsu revealed a staged roadmap for its Arm-based Monaka family at Technology Update 2025, positioning Monaka as the company next major datacenter CPU line. The initial Monaka CPU is scheduled for 2027 on a 2 nm process and uses the Armv9-A architecture. Fujitsu described a 3D chiplet layout that combines a core die with separate SRAM and I/O dies. A single Monaka chip carries 144 cores and two-socket configurations scale to 288 cores per node. The platform supports 12-channel DDR5 memory, PCIe 6.0 with CXL 3.0, and Arm SVE2, and Fujitsu is pitching the design as a high-efficiency part for Artificial intelligence inference, simulation, and large-scale data processing.

The roadmap then moves to more specialized and tightly coupled designs. Targeted for late 2029, Monaka-X is presented as a CPU-only product built on a 1.4 nm class process. Fujitsu says Monaka-X will be the first server CPU to implement Arm SME. That design uses a 3D many-core layout that is tightly coupled with a GPU and includes hardware confidential-computing features as standard. These choices emphasize on-package integration and security as Fujitsu adapts the architecture for high-throughput compute and vector-matrix work targeted at HPC and Artificial intelligence workloads.

Fujitsu plans two further steps that bring more acceleration on-package. A Monaka-X with NPU variant is slated for the second half of 2030 and adds an on-package NPU aimed at mid-sized LLMs, with Fujitsu exploring a reconfigurable engine plus a dedicated quantization accelerator. Arriving in 2031, Monaka-XX is described as a full CPU-NPU fusion chip, again planned on 1.4 nm or newer nodes. Overall, the roadmap shows Fujitsu pushing deeper into high-core-count Arm servers while incrementally integrating Artificial intelligence acceleration and confidential-computing features directly into the platform.

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