Cadence and Samsung Foundry deepen partnership to speed SoC and chiplet design for artificial intelligence and automotive sectors

Cadence expands its collaboration with Samsung Foundry, aiming to accelerate advanced SoC, 3D-IC, and chiplet solutions for artificial intelligence data centers, automotive applications, and RF connectivity.

Cadence has announced an expanded collaboration with Samsung Foundry, unveiling a new multi-year intellectual property (IP) agreement that will broaden Cadence´s portfolio of memory and interface IP solutions across Samsung’s advanced SF4X, SF5A, and SF2P process nodes. This strategic move is designed to further cement the companies´ technology alliance, focusing on delivering high-performance, low-power solutions tailored for artificial intelligence data centers, automotive platforms—such as advanced driver-assistance systems (ADAS)—and state-of-the-art RF connectivity.

By leveraging Cadence´s artificial intelligence-driven design tools and a comprehensive array of IP and silicon solutions, the partnership aims to give designers heightened productivity and reduce time to market for cutting-edge systems on chips (SoCs), chiplets, and 3D integrated circuits (3D-ICs) built using Samsung’s most advanced fabrication technologies. Boyd Phelps, senior vice president and general manager of the silicon solutions group at Cadence, emphasized that supporting a full suite of IP, subsystems, and chiplets on Samsung Foundry’s nodes—and renewing the IP agreement—further strengthens their shared commitment to innovation and market leadership.

Combining Cadence’s deep expertise in artificial intelligence-driven design with Samsung’s leading process technology is expected to provide mutual customers novel tools to speed development cycles and deploy innovative products more rapidly in dynamic markets. The extended partnership underlines both companies’ focus on the evolving requirements of artificial intelligence, automotive, and emerging RF connectivity verticals, ensuring that next-generation silicon and advanced packaging architectures reach commercialization with greater efficiency and reduced risk.

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