AMD Zen 7 Rumored to Feature Three Core Types and Larger Caches on TSMC A14 Node

AMD plans a major overhaul with Zen 7, introducing three classes of cores, enhanced cache sizes, and advanced manufacturing on TSMC´s A14 node to target diverse workloads including Artificial Intelligence.

AMD is charting an ambitious course for its Zen 7 CPUs, with new reports highlighting a shift to a more diversified multi-core strategy and significant upgrades in manufacturing technology. According to early information from tech leaker ´Moore´s Law Is Dead,´ Zen 7 will build on the multi-class core system seen in Zen 4c and Zen 5, further expanding to include three distinct core types. These will consist of traditional performance cores, high-density cores aimed at maximizing compute throughput, and a brand-new low-power core designed for energy-efficient tasks. This approach enables AMD to better tailor its processors to a wide range of workloads, from cloud virtualization to edge computing tasks requiring Artificial Intelligence accelerations. The introduction of unspecified ´PT´ and ´3D´ cores hints at future specialization and flexible architectural possibilities.

In terms of manufacturing, AMD will reportedly use TSMC´s advanced A14 process for Zen 7 compute chiplets (CCDs), which comes with the inclusion of a backside power delivery network. This shift was originally expected for TSMC´s N2 node, but AMD has opted for the A16/A14 family for improved performance and efficiency. Meanwhile, the 3D V-Cache SRAM chiplets stacked underneath will continue to use the more mature TSMC N4 process. This conservative move ensures manufacturing stability, even as the industry explores next-generation chip stacking on newer nodes. Memory and cache sizes are set for a significant boost as well, with each core expected to receive 2 MB of L2 cache (doubling from current designs) and the potential for L3 cache per core to reach 7 MB via stacked V-Cache technology. Shared L3 configurations will vary, with standard CCDs offering around 12 MB and dense-core CCDs providing up to 32 MB of L3 cache across 16 cores.

Bold rumors suggest Zen 7 could propel data center performance even further, with an EPYC server variant potentially packing 33 cores per CCD, totaling 264 cores across eight CCDs. This would represent a dramatic leap in core density and multi-threading capabilities for enterprise and high-performance workloads. Zen 7 is currently expected to reach tape-out by late 2026 or early 2027, with retail availability projected for 2028 or beyond. As with all early-stage technology roadmaps, these plans are subject to change as the platform evolves to meet future market demands and technological developments. Early details should be interpreted cautiously until AMD finalizes its design choices in the coming years.

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