A fresh leak from Moore´s Law is Dead describes AMD´s Medusa Halo APU as the company´s top-of-the-line chip planned for 2027 and rejects earlier rumors that the project was cancelled. The report says the design will rely on Zen 6 CPU chiplets manufactured on TSMC´s N2P process, while the input output die will use TSMC´s N3P process. The leak positions Medusa Halo as a multi-chiplet APU aimed at significantly increasing both CPU and GPU capability compared with current integrated designs.
On the CPU side, the base Medusa Halo configuration reportedly combines 12 Zen 6 cores plus two power efficient Zen 6 LP cores. High-end variants are said to add an additional 12-core Zen 6 CCD, delivering up to 24 CPU cores and potentially up to 26 cores when including the LP cores. The combination of N2P chiplets and an N3P I/O die reflects AMD´s use of different process nodes for compute and connectivity duties in its future APU strategy.
Graphics and memory enhancements are a focal point of the leak. Medusa Halo is said to feature 48 compute units based on RDNA 5 and 20 megabytes of L2 cache, a notable increase over the 40 CUs in the current Strix Halo APU. The leak suggests the integrated GPU could deliver performance near an NVIDIA GeForce RTX 5070 Ti. Memory support is reported as either a 384-bit LPDDR6 controller or a 256-bit LPDDR5X controller, both intended to provide the high bandwidth needed to feed the boosted GPU. Together, the CPU, GPU, and memory changes portray Medusa Halo as a substantial step up for built-in graphics and hybrid chip designs.
