Intel has landed a strategic packaging and test role for Tesla´s Dojo 3 program, marking a notable move away from Tesla´s previous single-supplier model. Samsung electronics foundry will handle fabrication, mass-producing Tesla´s next-generation chips on a 2 nm node, while Intel will apply its embedded multi-die interconnect bridge platform. The contract validates years of investment in module-level packaging and signals that such advanced assembly work is now attractive to external foundry customers as demand for large-scale Artificial Intelligence training hardware grows.
The technical rationale is clear. Dojo modules aggregate multiple 654 mm² dies into ultra-large arrays that strain conventional packaging approaches. Intel´s ´EMIB´ uses silicon bridges to link dies at the module level rather than relying on a full-wafer interposer. That modularity lets Tesla customize interconnect layouts, add features, and avoid some of the capacity and cost constraints that have pressured other providers. TSMC´s system-on-wafer options, and specifically CoWoS services, are operating near capacity as the industry chases high-performance computing and data-center workloads. By splitting fabrication and packaging, Tesla gains more control over ramp speed, yield optimization, and manufacturing cost structure.
The partnership is unusual because it pairs two historic rivals in a single supply chain: Samsung for nodes, Intel for advanced assembly. The arrangement is pragmatic. Samsung´s 2 nm node offers improved transistor density, while Intel´s packaging expertise addresses the mechanical and interconnect complexity of Dojo´s large tiled dies. For Tesla the benefits stretch beyond raw performance. Faster production of Dojo modules supports ambitions in full-self-driving, robotics, and in-house data-center compute. For the foundries it represents a strategic option to compete with TSMC by combining strengths rather than replicating every step internally.
