Intel has filed a patent describing a technique called software defined super cores, or sdc, that aims to boost single-thread performance by dynamically fusing two or more physical cores so they cooperatively execute a single thread while presenting themselves to the operating system as a single logical core. The proposed design would split an instruction stream into chunks and hand those chunks to the cooperating cores. The fused cores would coordinate using special buffers and fast communication paths to preserve correct memory ordering and data transfers. In heavier single-threaded workloads the processor could enter a fused mode and form a ´super core´ that aggregates instructions per cycle without needing higher voltage or frequency, which the patent suggests can improve performance per watt.
The filing highlights several implementation details and challenges. Keeping instructions in strict program order across multiple physical cores requires very low-latency inter-core messaging and careful synchronization. Scheduling the fused cores so they actually benefit real applications is a nontrivial software problem. The patent text notes that extracting maximum bandwidth from the approach would likely require compiler support and other toolchain changes. The article points to past experience, saying compiler requirements contributed to the failure of a prior architecture, itanium, as an example of the risks of relying on compiler magic.
If practical, the sdc approach would offer chip designers another lever to scale single-thread performance beyond traditional process shrinks and larger core designs. Whether sdc reaches shipping silicon will depend on prototype results and how well operating systems and compilers can leverage the fused mode. The patent underscores that Intel continually experiments with new core architectures but that not every experiment reaches volume production due to feasibility concerns. The filing therefore represents a research direction rather than a guarantee of future products.
