Intel foundry surfaced a reference ´Deer Creek Falls´ system on chip described as a ´non-x86´ design and built on the company’s 18A process node. The reference chip is Arm-based and uses a seven core layout: one performance core, two efficiency cores, and four low-power efficiency cores. It also integrates embedded PCIe and memory controller intellectual property and PHYs supplied by ecosystem partners, signaling a heterogeneous assembly of hybrid cores and third-party blocks rather than a monolithic in-house design.
The firm did not overtly label the design as Arm in the initial overlays, but a later section of the demonstration on performance tuning referenced AArch64, confirming the 64-bit Arm instruction set. Alongside the hardware, Intel highlighted a suite of performance optimization tools that support Arm-based processors, positioning its foundry services as able to assist customers with software tuning across different instruction set architectures, not only x86. That software toolset is aimed at helping customers extract better performance from their chosen core configurations and partner IP.
Observers noted that the showcased SoC is modest in scope, and not a flagship design, but it performs an important marketing and technical role for Intel foundry. It illustrates that Intel can manufacture heterogeneous designs that mix core types and third-party controllers on advanced process nodes. The video evidence was later delisted from Intel’s YouTube channel, though screenshots remain available. The timing matters because interest from external foundry customers could be critical as Intel seeks to scale its foundry business amid increased oversight and strategic interest from the U.S. government.
