Arteris joins UALink consortium to scale up high-performance Artificial Intelligence networks

Arteris has joined the Ultra Accelerator Link Consortium to support standards-based scale-up for high-bandwidth, low-latency Artificial Intelligence accelerators using its network-on-chip technology.

Arteris, Inc., a provider of system IP for accelerating semiconductor creation, announced membership in the Ultra Accelerator Link Consortium, UALink. The company said its network-on-chip technology is already used by technology leaders developing advanced high-bandwidth, low-latency HPC and Artificial Intelligence accelerators. UALink is presented as a standards-focused effort to enable scale-up across accelerator designs.

The announcement frames the move against a backdrop of surging demand for Artificial Intelligence compute, where general-purpose systems are said to be struggling to keep pace. The article states that this shortfall has increased interest in purpose-built computing and networking solutions tailored to the characteristics of modern Artificial Intelligence workloads. Arteris positions its network-on-chip technology as a component used by lead developers of such accelerators.

At the infrastructure level, the article emphasizes that hyperscale data center architectures must evolve to meet the growing demands of Artificial Intelligence. It highlights the need for highly efficient and fast connections across devices, arguing that efficient network-on-chip interconnects will be important on each chiplet and multi-die system on chip. The membership in UALink is framed as a step toward standardizing and supporting that scale-up, although the article does not provide technical specifics or additional roadmap details.

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