AMD starts Venice production on TSMC 2 nm

AMD says its next-generation EPYC processor, Venice, is ramping production in Taiwan on TSMC's 2 nm process technology. The company also plans a future production ramp at TSMC's Arizona fabrication facility for data center and Artificial Intelligence infrastructure.

AMD announced that its next-generation AMD EPYC processor, codenamed Venice, is ramping production in Taiwan on TSMC’s advanced 2 nm process technology, with future plans to ramp production at TSMC’s Arizona fabrication facility.

The move marks a milestone in AMD’s data center CPU roadmap and reflects continued progress toward delivering the performance and energy efficiency needed for next-generation cloud, enterprise and Artificial Intelligence infrastructure. Venice is the first high-performance computing product in the industry to enter production on TSMC’s advanced 2 nm process technology.

AMD says the production ramp is an important step in accelerating the next generation of Artificial Intelligence infrastructure. The company also points to rising Artificial Intelligence and agentic workloads, which are increasing demand for platforms that can move from innovation to production faster.

AMD highlighted its partnership with TSMC as a key factor in bringing its compute technologies to market with the speed and scale required to meet current infrastructure demand.

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