Resonac launches 27-member JOINT3 consortium to develop next-generation semiconductor packaging

Resonac has formed JOINT3, a 27-member co-creation evaluation framework, to develop materials, equipment and design tools for panel-level organic interposers. The company will open the Advanced Panel Level Interposer Center in Ibaraki, Japan, with a prototype line planned to start operations in 2026.

Resonac corporation announced the formation of JOINT3, a 27-member consortium that includes Resonac and 26 other companies from Japan, the United States, Singapore and other locations. The consortium is described as a co-creation evaluation framework made up of significant global leaders in the semiconductor supply chain. Its stated aim is to jointly develop materials, equipment and design tools optimized for panel-level organic interposers, a form of semiconductor packaging that uses organic materials to bridge components on a circuit board.

As the initiative´s main hub, Resonac will establish the Advanced Panel Level Interposer Center (APLIC) within its Shimodate plant (Minami-yuki) in Yuki city, in Ibaraki prefecture, Japan. APLIC will house a prototype production line sized for manufacturing 515 x 510 mm panel-level organic interposers. That prototype line is scheduled to commence operations in 2026. The consortium plans to use the prototype facility to produce verification results that closely mirror real-world structures, accelerating development and testing under production-like conditions.

The announcement identifies the participants as notable players across the semiconductor supply chain but does not list individual member companies. Resonac named Hidehito Takahashi as president and chief executive officer in the announcement context. By combining expertise across materials, equipment and design tooling, JOINT3 aims to streamline the development of panel-level organic interposer solutions and to validate those solutions on a full-size prototype line. Final verification and iteration will take place at APLIC to support faster, production-relevant outcomes for next-generation semiconductor packaging.

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