Marvell Technology announced that its Structera Compute Express Link memory-expansion controllers and near memory compute accelerators have completed interoperability testing with DDR4 and DDR5 memory solutions from Micron Technology, Samsung Electronics, and SK hynix. The company framed the milestone as an extension of its leadership in data infrastructure semiconductor solutions, and noted the tests cover both major memory generations used in server and data-center designs.
This interoperability milestone follows a recent announcement that Structera achieved successful interoperability with AMD EPYC processors and 5th Gen Intel Xeon Scalable platforms. Combined, the memory and CPU validation makes Structera the only CXL 2.0 product family with completed interoperability testing across both leading CPU architectures and all three major memory suppliers, according to Marvell.
Marvell highlighted the practical implications of the validation for system builders. Validation with DDR4 and DDR5 is intended to enable scalable system design, reduce integration risk, and streamline qualification cycles. The company positioned those outcomes as especially important as data-centric applications grow in complexity and memory increasingly contributes to overall system performance. Marvell said the validated interoperability gives original equipment manufacturers and cloud providers flexibility to optimize system designs while maintaining supply chain flexibility.
