Wei Shaojun, vice president of the China Semiconductor Industry Association, outlined a route for Chinese chipmakers to close the technology gap with NVIDIA by combining mature logic nodes with denser memory and new compute architectures. He said 14 nm logic chips, which lag the 4 nm-class silicon used in NVIDIA’s current Artificial Intelligence GPUs, could approach comparable performance when paired with 18 nm DRAM and linked using 3D hybrid bonding. That near-memory computing architecture places compute elements directly beside memory to reduce data movement and improve energy efficiency.
The proposal echoes Huawei’s recent “stacking and clustering” strategy and is positioned as a workaround to US export controls that restrict access to advanced nodes such as 5 nm and below. Wei emphasized the design would rely on a fully domestic supply chain. He noted that both 14 nm logic and 18 nm DRAM are covered by current US export restrictions, which limit access to foreign production. Wei also described the broader market issue as a “triple dependence” on NVIDIA hardware, CUDA software, and prevailing models and architectures, underscoring the ecosystem-level challenge for China to build parallel tooling and platforms.
Chinese alternatives to NVIDIA hardware are beginning to appear, according to the remarks. Wei highlighted emerging GPU and accelerator efforts, including Zhonghao Xinying, a startup founded by Google engineer Yanggong Yifa, which claims its custom ASIC TPU accelerator can reach ‘up to 1.5x’ the compute performance of NVIDIA’s older A100 GPU. The argument from proponents of stacking is that performance can scale by increasing chip integration density rather than relying solely on cutting-edge lithography, offering a path to close gaps in Artificial Intelligence compute capability within the limits of current supply chains and export controls.
