AMD UDNA RDNA 5 GPUs may feature 96 compute units and 384-bit memory bus

AMD´s next-generation UDNA (RDNA 5) GPUs could bring hefty upgrades, including up to 96 compute units and a wide 384-bit memory bus, boosting competition in high-end graphics and Artificial Intelligence workloads.

AMD is set to return to the high-end GPU market with its upcoming UDNA, also referred to as RDNA 5, architecture. Leaked details from trusted source Kepler_L2 suggest that the flagship Navi 5X SKUs will pack up to 96 compute units (CUs) and sport an expansive 384-bit memory bus, marking a significant leap from the previous RDNA 4 generation, which was limited to mid-range offerings.

The leaked roadmap also outlines AMD´s plans for multiple tiers within the UDNA lineup. Mid-tier GPUs are expected to offer configurations such as 64 compute units alongside a 256-bit memory bus, catering to mainstream enthusiasts. Entry-level models could feature 32 compute units paired with a 128-bit memory bus, ensuring a comprehensive product range. The exact memory capacities remain unknown, and there is ongoing speculation that GDDR7 could be featured, but AMD´s final choice is yet to be revealed. These preliminary specifications underscore AMD´s intent to challenge both gaming and professional markets, where high memory bandwidth and compute performance are critical.

Following RDNA 4´s absence in the extreme performance segment, the UDNA (RDNA 5) family signals AMD’s renewed focus on reclaiming ground in premium GPUs, which are increasingly important for gaming as well as data-intensive Artificial Intelligence workloads. Mass production of the UDNA GPUs is scheduled for the second quarter of 2026, with availability targeted for the latter half of the year. As launch approaches, AMD is expected to disclose more specifics on memory types and capacities, and enthusiasts are keenly anticipating microarchitectural updates that will define the next wave of Radeon graphics cards.

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